High Speed CMOS Comparator Design for Dynamic Power Management in IoT Applications

Abstract

By 2020, seven connected devices are projected to correspond to each human being[12].Such connected devices will follow the Internet of Things (IoT) and get into every aspect of human life. In order to power these devices,new strategies should recreated as these devices will not only have a dynamic load due to multiple features, but also dynamic sources if the rechargeable battery is supplemented by resourceful energy harvesting. The need for fine-grained power management in electronic ICs has resulted in the design and implementation of compact low drop regulators(LDOs) that are deeply embedded inside logic blocks[13]. Power Supply network(PSN) requires low drop out (LDO) regulators with high speed and low power comparators. A revised comparator architecture is modeled in 180 nm CMOS technology in order to achieve high speed and low power.A 2.5 volt comparator has been made. The engineering parameters of Cadence Virtuoso software 0.18 ?m are used for development. Designed comparator demonstrates reduced power consumption and delay compared to existing comparators. For applications needing less energy dissipation, good accuracy and high resolution, comparators are used..

Keywords: Low power Comparator, low dropout regulators, Cadence Virtuoso tools, IOT.