Phase Measurement Analysis in Field Programmable Gate Array (FPGA)

Abstract

Phase measurement is required in electronic applications where a synchronous connection between the signals should be protected. Customary electronic frameworks utilized for time measurement are planned utilizing a traditional blended flag approach. It causes vulnerability of phase connection between the recuperated signals. To deliver the need to enroll minute phase move changes inside a FPGA, we propose a plan for phase measurement rationale center having goals and accuracy in the scope of a couple of picoseconds. The working standard depends on subsample amassing utilizing methodical examining over the phase finder flag. The phase measurement rationale can work over a wide scope of computerized clock frequencies, going from a couple of kilohertz to the most extreme recurrence that is upheld inside the FPGA texture. A scientific model is created to delineate the working rule of the structure. We likewise examined the method of the phase measurement framework. This Proposed System Implemented utilizing Verilog HDL and Simulated by Modelsim 6.4 c and Synthesized by Xilinx tool. The proposed framework actualized in FPGA Spartan 3 XC3S 200 TQ-144.