CMOS Technology based Improved Architecture for Efficient Video Coding using Deblocking Filter

Abstract

The Deblocking Filter in Efficient Video coding has been to enhance the concern pleasant at the same time as reducing the complexity. By applying Deblocking filter to both horizontal and vertical boundaries of the block. Deblocking filter is regularly implemented to the frame renovale loop in each of the encoder and decoder to smoother the image pixels. In the proposed approach novel information structures and data get entry to schemes may be used for image pixels to reduce the range of facts get right of entry to and fine-tune timing performance for interpretation and operation of the image pixels. The proposed deblocking is implemented using NCSU 15nm Technology. Deblocking filter is designed through verilog code to get experimental results by using cadence tool.