Hybrid Memristive Memory Cell

Abstract

Digital storage memory technology suffers from quantization noise, which appears as demon in neural computing in terms of trade off between the word length and quantization noise. Analog memory is conceived as the best solution to tackle this problem. The fascinating word of analog memory though gets rid of quantization noise but poses the riddle of in band noise which is a trivial problem that made to move from analog to digital domain. An intermediate solution has been developed over the years that utilize the best of analog and digital domains while offering seamless memory compression. This storage technology transition leads to the evolution of number of different device technologies and architectures over the last decade. Among these memristor based storage cell is an interesting and promising solution. In this paper a Hybrid memristive memory cell with the advantage of MOS technology and memristor features is proposed, investigated and demonstrated. The proposed design has been simulated and tested for number of write and read cycles with N number of programming levels. The design has the advantage of subcell configuration and replicability. Further the design has been analyzed for the power, area, speed and stability of the stored states along with sustained repeatability. Investigation of the simulation results indicates the proposed cell to be promising with enhanced performance in comparison to the other existing designs.